This invention relates to semiconductor manufacturing processes, and more particularly, to an improved system and method for finding the operation/tool combination that causes integrated failure in a fabrication facility used in processing semiconductor wafers.
In order to produce a particular circuitry on a semiconductor wafer, the wafer has to pass through several processing steps. These processing steps involve depositing material layers and forming patterns on these material layers by photolithography, ion implantation, and thermal annealing, etc. Each of these processing steps must be performed perfectly on a wafer in order to produce functional circuitry. Each of the processing steps is monitored to detect errors.
To ensure that the circuitry be fully functional, in-line testers conduct electrical and/or physical tests on the wafers after certain key process steps, and the test data is sent to various diagnostic tools to determine whether any errors occurred in that particular process. For example, after a series of implantation process are performed, the wafer is examined to see if any defects have formed, or if the number of defects has exceeded a threshold level. If a defect is detected, or if the number of defects exceeds a threshold level, an operator adjusts the process immediately to ensure proper operation. After a wafer has gone through all the required processing steps, more comprehensive electrical and/or physical tests are then performed on each die on the wafer to ensure that the circuitry is functional. If defects are detected, then operators trace the processing history of the wafer and determine which process went wrong and generated the defects.
Methods have been developed in the past to determine the defective process. One method is the process-based commonality analysis. Because a semiconductor fab typically has several production lines running simultaneously, an operator may locate the defective process by finding a common process or tool that all of the defective wafers have passed through. Suppose wafers having high defective rates all went through a particular ion-implantation process, and wafers which did not go through that particular ion-implantation process had very few defects, then it is likely that the ion-implantation process is the source of the defects. By finding the common processes for which the defective wafers have gone through, the process-based commonality analysis provides a way of finding faulty processes.
However, some processes may have multiple tools. Moreover, some tools may be involved in more than one process. The commonality technique helps in showing the percentage of defective wafers that were processed by each tool for each process. In practical experience, the inventor found some occasion that being non-defective for the single tool itself, the percentage of defective wafers run through that tool is incredibly high. This kind of failure is a consequence of two cascaded tools being in an odd condition that does not fall into the common process window. The failure caused by a two operation/tool combination is more complicated than that caused by single tool or process, and has not been addressed before. Thus, an effective system and method, dealing with the integrated commonality analysis to determine the operation/tool combination that causes the integration errors in the manufacturing process is highly desired.